[tip:x86/cpu] x86, cpu: Update AMD CPUID feature bits

From: tip-bot for Andre Przywara
Date: Wed Sep 08 2010 - 17:28:35 EST


Commit-ID: 33ed82fb6c5f032151f7e9f1ac7b667f78f426b8
Gitweb: http://git.kernel.org/tip/33ed82fb6c5f032151f7e9f1ac7b667f78f426b8
Author: Andre Przywara <andre.przywara@xxxxxxx>
AuthorDate: Mon, 6 Sep 2010 15:14:18 +0200
Committer: H. Peter Anvin <hpa@xxxxxxxxxxxxxxx>
CommitDate: Wed, 8 Sep 2010 13:34:15 -0700

x86, cpu: Update AMD CPUID feature bits

AMD's public CPUID specification has been updated and some bits have
got names. Add them to properly describe new CPU features.

Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>
LKML-Reference: <1283778860-26843-3-git-send-email-andre.przywara@xxxxxxx>
Signed-off-by: H. Peter Anvin <hpa@xxxxxxxxxxxxxxx>
---
arch/x86/include/asm/cpufeature.h | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index c9c73d8..341835df 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -155,7 +155,11 @@
#define X86_FEATURE_XOP (6*32+11) /* extended AVX instructions */
#define X86_FEATURE_SKINIT (6*32+12) /* SKINIT/STGI instructions */
#define X86_FEATURE_WDT (6*32+13) /* Watchdog timer */
+#define X86_FEATURE_LWP (6*32+15) /* Light Weight Profiling */
+#define X86_FEATURE_FMA4 (6*32+16) /* 4 operands MAC instructions */
#define X86_FEATURE_NODEID_MSR (6*32+19) /* NodeId MSR */
+#define X86_FEATURE_TBM (6*32+21) /* trailing bit manipulations */
+#define X86_FEATURE_TOPOEXT (6*32+22) /* topology extensions CPUID leafs */

/*
* Auxiliary flags: Linux defined - For features scattered in various
--
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