On 06/29/2010 04:17 AM, Xiao Guangrong wrote:
If B is writeable-and-dirty, then it's D bit is already set, and weSorry, a typo in my reply, i mean mapping A and B both are writable-and-clean,
don't need to do anything.
If B is writeable-and-clean, then we'll have an spte pointing to a
read-only sp, so we'll get a write fault on access and an opportunity to
set the D bit.
while A occurs write-#PF, we should change A's spte map to writable sp, if we
only update the spte in writable-and-clean sp(form readonly to writable), the B's
D bit will miss set.
Right.
We need to update something to notice this:
- FNAME(fetch)() to replace the spte
- FNAME(walk_addr)() to invalidate the spte
I think FNAME(walk_addr) is the right place, we're updating the gpte, so we should update the spte at the same time, just like a guest write. But that will be expensive (there could be many sptes, so we have to call kvm_mmu_pte_write()), so perhaps FNAME(fetch) is easier.
We have now
if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep))
continue;
So we need to add a check, if sp->role.access doesn't match pt_access & pte_access, we need to get a new sp with the correct access (can only change read->write).