Re: [PATCH -v2 0/5] AMD L3 cache index disable fixes for .35

[Borislav Petkov]

From: "H. Peter Anvin" <hpa@xxxxxxxxx>
Date: Thu, Apr 22, 2010 at 05:23:05PM -0700

> Hi Borislav,
> 
> I get compilation failures on tip:x86/cpu with this patchset:
> 
> arch/x86/built-in.o: In function `amd_check_l3_disable':
> intel_cacheinfo.c:(.cpuinit.text+0x412): undefined reference to
> `num_k8_northbridges'
> 
> Both i386 and x86-64 "make allnoconfig".

Yeah, this has bitten us already several times in the past. allnoconfig
deselects CONFIG_PCI and num_k8_northbridges is under CONFIG_K8_NB which
depends on CONFIG_PCI so there you go.

I'm thinking the k8.c facility is needed more and more for all the
processor functionality control over the PCI config space so how about
compile it in unconditionally on AMD? All the k8's and F10h's need
it and the older ones will have it there but it won't hurt since the
pci_get_device() won't match any on those.

allnoconfig build failure is fixed this way, albeit non-functional since
CONFIG_PCI is off and pci_get_device() returns NULL but in that case
almost all of the functionality (I guess raw PCI access would still
work) depending on AMD northbridge PCI devices won't work anyway.

I'll prep something in a while.

-- 
Regards/Gruss,
Boris.

--
Advanced Micro Devices, Inc.
Operating Systems Research Center
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