Re: [PATCH 0/3] [idled]: Idle Cycle Injector for power capping

From: Vaidyanathan Srinivasan
Date: Tue Apr 20 2010 - 01:01:09 EST


* Arjan van de Ven <arjan@xxxxxxxxxxxxx> [2010-04-19 18:00:32]:

> On Mon, 19 Apr 2010 21:01:41 +0200
> Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote:
>
> > Right, so the IBM folks who were looking at power aware scheduling
> > were working on an interface to quantify the amount of power to save.
> >
> > But their approach, was an extension of the regular power aware
> > load-balancer, which basically groups tasks onto sockets so that whole
> > sockets can go idle.
> >
> > However Arjan explained to me that your approach, which idles the
> > whole machine, has the advantage that also memory banks can go into
> > idle mode and save power.
> >
> > Still in the interest to cut back on power-saving interfaces it would
> > be nice to see if there is anything we can do to merge these things,
> > but I really haven't thought much about that yet.
>
> one correction, this is not about power *saving*, it is about power
> *capping*. Power capping is pretty much energy inefficient by
> definition (and surely in practice), but it's about dealing with
> reality about underdimensioned airconditioning or voltage rails....
>
> Due to the reality that socket offlining isn't as good as idle
> insertion.. I rather focus on the later...

The power reduction benefit is architecture and topology dependent.
Like on POWER platform, socket offlining could provide better power
reduction than idle injection.

As mentioned by Arjan, these approaches help reduce average power
consumption to meet power and cooling limitation over a short
interval. These are not general optimizations to improve operating
efficiency, however when use at certain workload and utilization
levels, these can potentially provide overall energy savings.

Having the SMP load balancer pull jobs away form a core or socket to
allow it to remain idle for short burst of time will be an good
implementation.

--Vaidy

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