Re: USB mass storage and ARM cache coherency

[Matthew Dharm]

On Fri, Jan 29, 2010 at 08:51:47PM +0300, Sergei Shtylyov wrote:
> Catalin Marinas wrote:
> 
> >That would be a more general solution rather than going through each HCD
> >driver since my understanding is that flush_dcache_page() is only needed
> >together with the mass storage support.
> 
>   Note that DMA capable driver can be doing some transfers in PIO mode 
> or falling back to PIO mode if DMA mode transfer is unsuccessful (the 
> musb driver is an example of the latter and if the DMA rewrite patches 
> will get accepted, it'll do short transfers in PIO mode).

Given that an HCD can choose, on the fly, if it's using DMA or PIO, the HCD
driver is the only place to reasonably put any cache-synchronization code.

That said, what do the other SCSI HCDs do?  I'm guessing the question gets
kinda muddy there, since the other SCSI HCDs all talk directly to some
piece of hardware, and thus are responsible for the cache management
themselves.

Based on that, one could argue that ub and usb-storage should be doing
this.

HOWEVER, I firmly believe that the cache-management functions belong with
the driver that actually talks to the low-level hardware, as that's the
only place where you can be 100% certain of what cache operations are
needed.  After all, I think someone is working on a USB-over-IP transport,
and trying to manage cache at the usb-storage level in that scenario is
just silly.

So, let's put this in the HCD drivers and be done with it.

Matt

-- 
Matthew Dharm                              Home: mdharm-usb@xxxxxxxxxxxxxxxxxx 
Maintainer, Linux USB Mass Storage Driver

I see you've been reading alt.sex.chubby.sheep voraciously.
					-- Tanya
User Friendly, 11/24/97

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