On Wed, Jan 27, 2010 at 11:32:27AM -0800, adharmap@xxxxxxxxxxxxxx wrote:Actually the comment in gic_dist_init mentions about configuring SPI's as level low when the GIC only supports level high. That suggests presence of an inverter.+ if (flow_type & (IRQ_TYPE_EDGE_RISING|IRQ_TYPE_EDGE_FALLING)) {
+ reg_value |= (2<<bit_index);
+ writel(reg_value, gic_dist_base(irq) + GIC_DIST_CONFIG
+ + register_index);
+ __set_irq_handler_unlocked(irq, handle_edge_irq);
+ }
+
+ if (flow_type & (IRQ_TYPE_LEVEL_HIGH|IRQ_TYPE_LEVEL_LOW)) {
This is actually where things start to get rather sticky - because
there may well be on-chip inverters between the GIC and external
peripherals.
Agree, but this change at least lets us configure them as edge/level triggered.
Since the GIC can only sense one edge or one level depending on the
hardware setup, it seems wrong to allow the configuration of both
high and low levels, and both edges.