Re: SATA_SIL: Add a work-around for IXP4xx CPU.

[Tejun Heo]

Hello,

On 11/11/2009 09:04 AM, Krzysztof Halasa wrote:
> IXP4xx CPUs can't read from 8 and 16-bit PCI MMIO registers, we have to read
> from normal IO regions instead.
> 
> Tested on SIL3512, and specifically not tested on 4-port SIL3114.
> 
> Signed-off-by: Krzysztof HaÅasa <khc@xxxxxxxxx>

Hmmm... Given that there are some platforms which have problem with
mmio and sil3112/4 can do everything via io accesses, it would be nice
to generalize this so that there's CONFIG_SATA_SIL_NO_MMIO which is
selected by affected platforms.  Are you interested in doing it?

Thanks.

-- 
tejun
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