Adding a a new interrupt controller over PCIe.

[Esben Nielsen]

Hey,

We have an application where we have Xilinx FPGAs attached to our main
CPU (x86) via PCI-express. In the FPGAs we have among other things
relatively standeard UARTs and ethernet devices and we want to use
standeard drivers. But all the interrupts from these devices are
channelled into one interrupt controller
(http://www.xilinx.com/support/documentation/ip_documentation/xps_intc.pdf) per FPGA giving us one MSI interrupt to the CPU per FPGA.

The FPGAs are "hotplugged".

I can see some examples in the tree of people adding interrupt
controllers using struct irq_chip - but all at startup and on non-x86
architectures.

I tried to use the irq_chip structure and calls to create_irq_nr(),
set_irq_chip() and friends to get chained irq numbers belonging to the
new interrupt controller. But create_irq_nr() fails for me, and when I
look into the x86 implementation of it
( arch/x86/kernel/apic/io_apic.c), I see that it only supports
traditional APIC interrupts: It assumes that all irq_desc->chip_data are
a irq_cfg, not a general thing.

Have anyone dealt with anything similar?
Am I on the completely wrong track?

Esben
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