Re: [PATCH] PCI: Always set prefetchable base/limit upper32 registers

[Yinghai Lu]

Alex Williamson wrote:
> On Mon, 2009-11-30 at 18:50 -0800, Yinghai Lu wrote:
>> Yinghai Lu wrote:
>>> Alex Williamson wrote:
>>>> Ok, sorry I missed this.  Yes, this is getting called, but when we get
>>>> back to pci_setup_bridge() that flag is missing IORESOURCE_MEM_64.
>>>> Perhaps these are different resources?  I'm still tracing the code to
>>>> find out what happened to that flag.
>>>>
>>>> Also, I'm running 64bit(x86_64), and if lspci is wrong, then so is
>>>> setpci.  I don't think there's an "ignore upper32" anywhere, so the
>>>> result of 0xffffffffabc00000 - 0x00000000abc00000 is that base > limit
>>>> thus the range is disabled at the bridge and the ROM resource we
>>>> assigned into the window behind the bridge is inaccessible.
>>> can you check
> [snip]
> 
> The upper32 base register works as advertised, that's not where we clear
> the MEM_64 flag.  I tracked that down to pbus_size_mem().  So, we have a
> MEM_64 capable prefetchable base, but we want to use it to map a 32bit
> resource behind the bridge (a ROM in this case), so we drop the MEM_64
> flag, causing us to hit pci_setup_bridge() with the flag clear and thus
> not touching UPPER32.  I think your second patch would also solve this
> since it separates the desired resource size from the register size.
> However, it seems much more simple to unconditionally write the upper32
> registers as was done for all 2.6 kernels up to 2.6.30.  Thanks,

if the bridge self does not support 64bit pref mmio, we should not touch
upper32 reg.

will update the my second patch with your analysis

YH
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