Re: [PATCH] cpu-freq: add troubleshooting section for FSB changes
From: Arjan van de Ven
Date: Sat Nov 07 2009 - 17:59:58 EST
in addition, most FSB systems have the memory controller in the chipset,So when should people look at this?
next to the PCI logic... so that the FSB bus for DMA transactions only
carries the snoop traffic, not the whole data.
at this point the atheros folks haven't even confirmed that this is the cause...
I'm not saying that the linux behavior is optimal with P states (I have a rather
sizeable algorithm rewrite in the queue) but to blame anything and everything on
a half-speed FSB during a very idle system?
I'm still somewhat skeptical. Again.. the CPU is basically idle here (otherwise
ondemand would ramp the freq up quickly); at which point the FSB traffic mostly is
just cache coherency traffic.... much less bandwidth intensive.
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