RE: [PATCH 29/29] ioat2, 3: cacheline align software descriptorallocations

[Sosnowski, Maciej]

Williams, Dan J wrote:
> All the necessary fields for handling an ioat2,3 ring entry can fit into
> one cacheline.  Move ->len prior to ->txd in struct ioat_ring_ent, and
> move allocation of these entries to a hw-cache-aligned kmem cache to
> reduce the number of cachelines dirtied for descriptor management.
> 
> Signed-off-by: Dan Williams <dan.j.williams@xxxxxxxxx>
> ---

Signed-off-by: Maciej Sosnowski <maciej.sosnowski@xxxxxxxxx>
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