kernel page table mapping for >1GB <3 GB for x86 arch without PAE

From: joe Shmoe
Date: Fri Aug 28 2009 - 14:08:17 EST

Assuming I have 3GB RAM, why does not kernel create page tables in a way that all of this 3GB physical memory can be addressed . (for x86 arch 32 bit with PAE disabled )

I understand the 3GB/1GB split for user/kernel address space.Isn't  this just a matter of setting up the page table entries in such a way that so all the available RAM upto 3GB can mapped in the kernel page tables. In this way CPU's MMU can take care of mapping any virtual address within first 4GB to physical address using the page table entries regardless of a process is in kernel/user mode.

Why can't some of first 768 page directory entries ( + 1024 page table
entries for each PDE) be used to map btw 1GB and 3GB. What is stopping the kernel from doing this?

Instead why does kernel uses high memory mapping with zone model for
addressing physical memory above 1GB?

Can anyone please shed some light into this,


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