Re: [PATCH -tip] perf_counter/x86: Correct some event and umaskvalues for Intel processors

[Ingo Molnar]

* Yong Wang <yong.y.wang@xxxxxxxxxxxxxxx> wrote:

> On Tue, Jun 09, 2009 at 04:16:21PM +0200, Ingo Molnar wrote:
> > 
> > * Yong Wang <yong.y.wang@xxxxxxxxxxxxxxx> wrote:
> > 
> > > Correct some event and UMASK values according to Intel SDM.
> > 
> > Very nice, thanks!
> > 
> > were you able to test the Atom ones by any chance?
> > 
> 
> You bet I was as I'm working on Moblin ;-) [...]

Heh :-)

> [...] However, some work while some do not. I'll take a look at 
> the problematic ones. With the previous event and umask values, 
> the pmc does not count at all for some events, like l1d-write-ops.

Interesting. I had a good look at the Atom details in the docs but 
couldnt find anything suspicious. There's various umask level 
extensions (sometimes cflags level ones) like whether to measure the 
core or the thread, but the defaults (zero) seem to have OK 
semantics for most of the events.

Btw., when mapping out event tables there's one little trick i used 
to 'scan' an event, using 'perf stat' and raw event numbers:

  for ((i=0;i<256;i++)); do                                    \
    perf stat -e $(printf "r%02x%02x\n" $i 0xc0) true 2>&1 |   \
      grep -w raw | grep -vw 0;                                \
  done

This scans all 256 umask values for the main event code of 0xc0, and 
displays the umask values where the counter show some activity.

( if it's some rare event then you might want to run something else 
  that excercises that event, not /bin/true. )

> Btw, one thing I don't quite understand is why you aliased 
> dtlb-write-ops to l1d-write-ops when setting event and umask 
> values. Are they the same event?

No, they are indeed different events - that's a bug in the table, 
good spotting. Mind sending a (tested) patch for it?

Thanks,

	Ingo
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