[PATCH 0/7] ASIC3 updates

[Philipp Zabel]

Hi,

here are a few ASIC3 updates, enabling the DS1WM (w1/master) and
SDIO/MMC (mmc/host) cells. Patch 1 adds functions to change EXTCF
and SDHWCTRL registers, which will also be needed for PCMCIA.

I tried to write the clock handling code in patch 2 in a way that should
make it easy to convert to the clk API, if we'll ever get a common struct
clk oder clkops across architectures.

Patch 5 removes the unneeded SD/SDIO controller register definitions,
since the tmio_mmc driver should take care of that.

regards
Philipp
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