Re: [LLVMdev] inline asm semantics: output constraint width smaller than input

[H. Peter Anvin]

Kyle Moffett wrote:
> Actually, PPC64 boxes basically don't care... the usable GPRs are all
> either 32-bit (for PPC32) or 64-bit (for PPC64), the <=32-bit
> instructions are identical across both, they just
> truncate/sign-extend/etc based on the lower 32-bits of the register.
> Also, you would only do a right-shift if you were going all the way
> out to memory as 64-bit and all the way back in as 32-bit... within a
> single register it's kept coherent.

Think about a 64-bit integer on ppc32.  It will by necessity kept in two 
registers.  On gcc I believe it will always be a consecutive pair of 
registers (AFAIK that's a hard-coded assumption in gcc, with the result 
that gcc has a nonstandard internal register numbering for x86 since the 
commonly used dx:ax pair is actually registers 2:0 in the hardware 
numbering.)

> Structs are basically irrelevant for inline ASM as you can't pass a
> struct to one... you can only pass the *address* of a struct, which is
> always pointer-sized.

Right, of course.

> I think that really the only sane solution (which is hopefully what
> GCC does) for integer types is to use a register the same size as the
> larger of the two integers.  Then you copy the value to/from the
> smaller register (or just mask it on PPC64-alike architectures) before
> or after the inline ASM.

Pretty much.  Then you can do conventional copy propagation and 
elimination after expanding subregisters to get rid of the extra ops in 
the common case.

	-hpa

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