From: Luis R. Rodriguez
Date: Thu Oct 23 2008 - 21:40:39 EST

I know, the question is silly right? I thought so too, but I started
reviewing the code and noticed most of it is just setting up values in
data structures for the kernel's awareness of capabilities, it also
updates the state in case of BIOS foobar, and there is also clock
retraining if possible to reduce latency. Is that it? Did I miss
something or is it really possible for devices to be able to use
L0s|L1 or L1 by just having a BIOS which does things correctly?

That is can our devices be using ASPM without any OS interaction,
without CONFIG_PCIEASPM enabled?


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