Re: [PATCH] x86: SB450: skip IRQ0 override if it is not routed to INT2 of IOAPIC

From: Rafael J. Wysocki
Date: Tue Oct 07 2008 - 16:27:38 EST


On Tuesday, 7 of October 2008, Andreas Herrmann wrote:
> On Mon, Oct 06, 2008 at 10:39:25PM +0100, Maciej W. Rozycki wrote:
> > On Mon, 6 Oct 2008, Andi Kleen wrote:
> >
> > > The real reason is actually a workaround in the BIOS for problems
> > > in the older Linux code that caused duplicated timer interrupts. The
> > > old Linux would fall into "enable both IO-APIC and 8259" fallback mode
> > > and the resulted in duplicated timer events, which made everything unhappy.
> > > They instead configured the northbridge in a way that one of the inputs
> > > is ignored.
> >
> > Hmm, working around Linux problems in the BIOS is a new and truly odd
> > concept to me. It's not that we are unresponsive or do not take
> > responsibility for our bugs, is it?
>
> So, let's work around BIOS bugs in Linux then ...
>
> Following patch is almost untested -- especially I didn't get my
> hands on one of the HP Laptops with broken DSDT.

The patch works on my nx6325. I removed the DMI workarouds for this test, so
I'm quite sure. :-)

You can add my Tested-by to it too.

Thanks,
Rafael


> --
>
> On some HP nx6... laptops (e.g. nx6325) BIOS reports an IRQ0 override
> but the SB450 chipset is configured such that timer interrupts goe to
> INT0 of IOAPIC.
>
> Check IRQ0 routing and if it is routed to INT0 of IOAPIC skip the
> timer override.
>
> Signed-off-by: Andreas Herrmann <andreas.herrmann3@xxxxxxx>
> ---
> arch/x86/kernel/early-quirks.c | 48 ++++++++++++++++++++++++++++++++++++++++
> 1 files changed, 48 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
> index 4353cf5..6b839b1 100644
> --- a/arch/x86/kernel/early-quirks.c
> +++ b/arch/x86/kernel/early-quirks.c
> @@ -95,6 +95,52 @@ static void __init nvidia_bugs(int num, int slot, int func)
>
> }
>
> +static u32 ati_ixp4x0_rev(int num, int slot, int func)
> +{
> + u32 d;
> + u8 b;
> +
> + b = read_pci_config_byte(num, slot, func, 0xac);
> + b &= ~(1<<5);
> + write_pci_config_byte(num, slot, func, 0xac, b);
> +
> + d = read_pci_config(num, slot, func, 0x70);
> + d |= 1<<8;
> + write_pci_config(num, slot, func, 0x70, d);
> +
> + d = read_pci_config(num, slot, func, 0x8);
> + d &= 0xff;
> + return d;
> +}
> +
> +static void __init ati_bugs(int num, int slot, int func)
> +{
> +#if defined(CONFIG_ACPI) && defined (CONFIG_X86_IO_APIC)
> + u32 d;
> + u8 b;
> +
> + if (acpi_use_timer_override)
> + return;
> +
> + d = ati_ixp4x0_rev(num, slot, func);
> + if (d < 0x82)
> + acpi_skip_timer_override = 1;
> + else {
> + /* check for IRQ0 interrupt swap */
> + outb(0x72, 0xcd6); b = inb(0xcd7);
> + if (!(b & 0x2))
> + acpi_skip_timer_override = 1;
> + }
> +
> + if (acpi_skip_timer_override) {
> + printk(KERN_INFO "SB4X0 revision 0x%x\n", d);
> + printk(KERN_INFO "Ignoring ACPI timer override.\n");
> + printk(KERN_INFO "If you got timer trouble "
> + "try acpi_use_timer_override\n");
> + }
> +#endif
> +}
> +
> #define QFLAG_APPLY_ONCE 0x1
> #define QFLAG_APPLIED 0x2
> #define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
> @@ -114,6 +160,8 @@ static struct chipset early_qrk[] __initdata = {
> PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, via_bugs },
> { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
> PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, fix_hypertransport_config },
> + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS,
> + PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },
> {}
> };
>


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