* Avi Kivity <avi@xxxxxxxxxxxx> wrote:
Enabling Intel VT has the curious side effect whereby the INIT signal is blocked. Rather than comment on the wisdom of this side effect, this patch adds an emergency restart reboot notifier, and modifies the kvm reboot notifier to disable VT on emergency reboot.
looks good to me - i was bitten by that problem on a testbox.
4.7.3.6 Reset Register
The optional ACPI reset mechanism specifies a standard mechanism that provides a complete system reset.
When implemented, this mechanism must reset the entire system. This includes processors, core logic, all
buses, and all peripherals. From an OSPM perspective, asserting the reset mechanism is the logical
equivalent to power cycling the machine. Upon gaining control after a reset, OSPM will perform actions in
like manner to a cold boot.
The reset mechanism is implemented via an 8-bit register described by RESET_REG in the FADT (always
accessed via the natural alignment and size described in RESET_REG). To reset the machine, software will
write a value (indicated in RESET_VALUE in FADT) to the reset register. The RESET_REG field in the
FADT indicates the location of the reset register.
The reset register may exist only in I/O space, Memory space, or in PCI Configuration space on a function
in bus 0. Therefore, the Address_Space_ID value in RESET_REG must be set to I/O space, Memory space,
or PCI Configuration space (with a bus number of 0). As the register is only 8 bits, Register_Bit_Width
must be 8 and Register_Bit_Offset must be 0.
The system must reset immediately following the write to this register. OSPM assumes that the processor
will not execute beyond the write instruction. OSPM should execute spin loops on the CPUs in the system
following a write to this register.
Acked-by: Ingo Molnar <mingo@xxxxxxx>
Seems best to merge this via the KVM tree, right?