Re: [RFC 00/15] x86_64: Optimize percpu accesses

[Jeremy Fitzhardinge]

Christoph Lameter wrote:
> H. Peter Anvin wrote:
>
>   
> > It will, but it might still be a net loss due to higher load on the TLB
> > (you're effectively using the TLB to do the table lookup for you.)  On
> > the other hand, Mike points out that once we move away from fixed-sized
> > segments we pretty much have to use virtual addresses anyway(*).
> >     
>
> There will be no additional overhead since the memory already mapped 1-1 using 2MB TLBs and we want to use the same for the percpu areas. This is similar to the vmemmap solution.
>
>   
> > > The first percpu area would ideally be the per cpu segment generated
> > > by the linker.
> > >
> > > How would that fit into the address map? In particular the 2G distance
> > > between code and the first per cpu area must not be violated unless we
> > > go to a zero based approach.
> > >       
> > If with "zero-based" you mean "nonzero gs_base for the boot CPU" then
> > yes, you're right.
> >
> > Note again that that is completely orthogonal to RIP-based versus absolute.
> >     
>
> ?? The distance to the per cpu area for cpu 0 is larger than 2G. Kernel wont link with RIP based addresses. You would have to place the per cpu areas 1TB before the kernel text.

If %gs:0 points to start of your percpu area, then all the offsets off 
%gs are going to be no larger than the amount of percpu memory you 
have.  The gs base itself can be any 64-bit address, so it doesn't 
matter where it is within overall kernel memory.  Using zero-based 
percpu area means that you must set a non-zero %gs base before you can 
access the percpu area.

If the layout of the percpu area is done by the linker by packing all 
the percpu variables into one section, then any address computation 
using a percpu variable symbol will generate an offset which is 
appropriate to apply to a %gs: addressing mode.

The nice thing about the non-zero-based scheme i386 uses is that setting 
gs-base to zero means that percpu variables accesses get directly to the 
prototype percpu data area, which simplifies boot time setup (which is 
doubly awkward on 32-bit because you need to generate a GDT entry rather 
than just load an MSR as you do in 64-bit).

   J
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