Re: [PATCH 0 of 4] mm+paravirt+xen: addpte read-modify-write abstraction

From: Zachary Amsden
Date: Mon Jun 02 2008 - 16:09:37 EST


On Sat, 2008-05-31 at 01:13 +0100, Jeremy Fitzhardinge wrote:
> Zachary Amsden wrote:
> > We don't fault. We write directly to the primary page tables, and clear
> > the pte just like native. We just issue all mprotect updates in the
> > queue, and flush the queue when leaving lazy mmu mode. You can't wait
> > for the TLB flush, you must flush the updates before releasing the
> > pagetable lock, or you could get misordered updates in an SMP system.
> >
>
> How do you track which ptes need shadow updates? Do you walk the entire
> pagetable on tlb flush? Or just rebuild the shadow from scratch on demand?

No, we queue the updates as well as writing the primaries, we just flush
the queue before dropping the PT lock for one trip to the hypervisor.

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