Re: [PATCH] [POWERPC] Improve (in|out)_beXX() asm code

From: Trent Piepho
Date: Tue May 20 2008 - 18:16:27 EST

On Wed, 21 May 2008, Andreas Schwab wrote:
Trent Piepho <tpiepho@xxxxxxxxxxxxx> writes:

For the LE versions, eventually they boil down to an asm that will look
something like this:
asm("sync; stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));

While not perfect, this appears to be the best one can do. The issue is
that the "stwbrx" instruction only comes in an indexed, or 'x', version, in
which the address is represented by the sum of two registers (the "0,%2").
Unfortunately, gcc doesn't have a constraint for an indexed memory

There is the "Z" constraint, which matches either an indirect or an
indexed memory address. That should fit here.

This came up on the Freescale list. I should have put what I wrote there into
my patch descrition:

It's the _le versions that have a problem, since we can't get gcc to just use
the register indexed mode. It seems like an obvious thing to have a
constraint for, but I guess there weren't enough instructions that only come
in 'x' versions to bother with it. There is a 'Z' constraint, "Memory operand
that is an indexed or indirect from a register", but I tried it and it can use
both "rb,ri" and "disp(rb)" forms. Actually, I'm not sure how 'Z' is any
different than "m"?
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