Re: RFC: outb 0x80 in inb_p, outb_p harmful on some modern AMD64with MCP51 laptops

[Alan Cox]

On Thu, 13 Dec 2007 20:50:33 -0500
"David P. Reed" <dpreed@xxxxxxxx> wrote:

> Simulating 1 microsecond delays (assuming LPC meets that goal for 0x80) 
> is "absolutely correct" for devices provided on PCI-X running on 3 GHz 
> or greater machines?

Yes - the LPC bus clock doesn't change for the CPU clock.
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