Re: [patch] x86: improved memory barrier implementation
From: Dave Jones
Date: Sat Sep 29 2007 - 21:44:08 EST
On Fri, Sep 28, 2007 at 05:07:19PM +0100, Alan Cox wrote:
> > Winchip: can any of these CPUs with ooostores do SMP? If not, then smp_wmb
> > can also be a simple barrier on i386 too.
> The IDT Winchip can do SMP apparently.
>From the Winchip3 (which was the final winchip) specs..
"The IDT WinChip 3 processor also omits the software interface
to the Intel-proprietary symmetric multiprocessing support: APIC.
This bus function is omitted since the target market for the
IDT WinChip 3 processor is typical desktop systems (which
do not support APIC multiprocessing)."
It didn't offer any alternative DIY-SMP either (or at least
none that's documented).
Centaur only became SMP capable with some of the C3 Nehemiah's
a year or two back.
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