Re: [PATCH] X86_64: hpet tsc calibration fix broken smi detectionlogic

[Andrew Morton]

On Sat, 14 Jul 2007 10:41:39 +0200 Thomas Gleixner <tglx@xxxxxxxxxxxxx> wrote:

> The current SMI detection logic in read_hpet_tsc() makes sure,
> that when a SMI happens between the read of the HPET counter and
> the read of the TSC, this wrong value is used for TSC calibration.
> 
> This is not the intention of the function. The comparison must ensure,
> that we do _NOT_ use such a value.
> 
> Fix the check to use calibration values where delta of the two TSC reads
> is smaller than a reasonable threshold.
> 
> Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
> 
> --- a/arch/x86_64/kernel/hpet.c
> +++ b/arch/x86_64/kernel/hpet.c
> @@ -190,7 +190,7 @@ int hpet_reenable(void)
>   */
>  
>  #define TICK_COUNT 100000000
> -#define TICK_MIN   5000
> +#define SMI_THRESHOLD 50000
>  #define MAX_TRIES  5
>  
>  /*
> @@ -205,7 +205,7 @@ static void __init read_hpet_tsc(int *hpet, int *tsc)
>  		tsc1 = get_cycles_sync();
>  		hpet1 = hpet_readl(HPET_COUNTER);
>  		tsc2 = get_cycles_sync();
> -		if (tsc2 - tsc1 > TICK_MIN)
> +		if ((tsc2 - tsc1) < SMI_TRESHOLD)
>  			break;
>  	}
>  	*hpet = hpet1;
> 

So I queued this, and then another patch to revert it so that the
x86_64-clockevents conversion would apply.  But I was unable to locate the
corresponding bug in the post-x86_64-clockevents tree.  Did it get fixed by
other means in there?

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