[patch 27/32] SPARC64: Fix _PAGE_EXEC_4U check in sun4u I-TLB miss handler.

From: Chris Wright
Date: Fri Jun 08 2007 - 03:30:23 EST

-stable review patch. If anyone has any objections, please let us know.

From: David Miller <davem@xxxxxxxxxxxxx>

It was using an immediate _PAGE_EXEC_4U value in an 'and'
instruction to perform the test. This doesn't work because
the immediate field is signed 13-bit, this the mask being
tested against the PTE was 0x1000 sign-extended to 32-bits
instead of just plain 0x1000.

Signed-off-by: David S. Miller <davem@xxxxxxxxxxxxx>
Signed-off-by: Chris Wright <chrisw@xxxxxxxxxxxx>

arch/sparc64/kernel/itlb_miss.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

--- linux-
+++ linux-
@@ -11,12 +11,12 @@
/* ITLB ** ICACHE line 2: TSB compare and TLB load */
bne,pn %xcc, tsb_miss_itlb ! Miss
- andcc %g5, _PAGE_EXEC_4U, %g0 ! Executable?
+ sethi %hi(_PAGE_EXEC_4U), %g4
+ andcc %g5, %g4, %g0 ! Executable?
be,pn %xcc, tsb_do_fault
nop ! Delay slot, fill me
stxa %g5, [%g0] ASI_ITLB_DATA_IN ! Load TLB
retry ! Trap done
- nop

/* ITLB ** ICACHE line 3: */

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