Re: Uses for memory barriers

[Segher Boessenkool]

> 2.	All stores to a given single memory location will be perceived
> 	as having occurred in the same order by all CPUs.

All CPUs that _do_ see two stores to the same memory location happening,
will see them occurring in the same order -- not all CPUs seeing a
later store will necessarily see the earlier stores.


Segher

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