Re: Dual core Athlons and unsynced TSCs

[thockin]

On Fri, Jan 13, 2006 at 01:18:35PM -0800, David Lang wrote:
> Lee, the last time I saw this discussion I thought it was identified that 
> the multiple cores (or IIRC the multiple chips in a SMP motherboard) would 
> only get out of sync when power management calls were made (hlt or 
> switching the c-state). IIRC the workaround that was posted then was to 
> just disable these in the kernel build.

not using 'hlt' when idling means that you spend 10s of Watts more power
on mostly idle systems.
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