Re: APIC version and 8-bit APIC IDs

[Martin Wilck]

Maciej W. Rozycki wrote:

>  Well, Intel's "Multiprocessor Specification" mandates that (see section 
> 3.6.1 and also the compliance list in Appendix C).  I does not mandate 
> local APIC IDs to be consecutive though.

Unless I am mistaken, the MP spec does not say that _CPUs_ must start 
from 0. We had an IO-APIC at 0. The MP spec says that the IDs must be 
unique (I am told this isn't true any more because an IO APIC and a CPU 
may have the same ID) and _need not_ be consecutive.

We tried different setups; one had IO APICs at 0,1,2 and CPUs starting 
at 16. I can't see that this is forbidden (the reason is that the 
IO-APICs have only 4-bit APIC ID registers). Anyway we changed it now to 
have both IO-APICs and CPUs start at 0.

Regards
Martin

--
Martin Wilck                Phone: +49 5251 8 15113
Fujitsu Siemens Computers   Fax:   +49 5251 8 20409
Heinz-Nixdorf-Ring 1        mailto:Martin.Wilck@xxxxxxxxxxxxxxxxxxx
D-33106 Paderborn           http://www.fujitsu-siemens.com/primergy
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/