Re: [RFC] Cachemap for 2.6.12rc4-mm1. Was Re: [PATCH] enhance x86MTRR handling

[H. Peter Anvin]

Dave Jones wrote:
> On Fri, May 13, 2005 at 04:36:10PM -0700, H. Peter Anvin wrote:
>
>  > The Efficeon (TM8xxx) series does have PAT.
>
> 1:1 with the Intel implementation I assume based on your earlier comments?

More or less.  They don't implement WT and WP (defaulting to WB with 
full cache coherency and something else).

	-hpa
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