Re: ptep_establish/establish_pte needs set_pte_atomic and all set_pte must be written in asm

From: Andrea Arcangeli
Date: Sun Sep 26 2004 - 10:41:09 EST


On Sun, Sep 26, 2004 at 03:29:48PM +1000, Benjamin Herrenschmidt wrote:
> On Sun, 2004-09-26 at 11:32, Andrea Arcangeli wrote:
>
> > maybe I'm biased because I'm reading x86-64 code, but where? the
> > software mkdirty and mkyoung seem to all be inside the page_table_lock.
>
> ppc and ppc64 who treat their hash table as a kind of big tlb cache, and
> embedded ppc's with software loaded TLBs all have the TLB or hash refill
> mecanism "mimmic" a HW TLB load, that is it is assembly code that will
> set the DIRTY or ACCESSED bits without taking the page table lock

ok, I thought you were talking about common code setting the dirty and
accessed bit. The x86 architecture in hardware as well sets dirty and
accessed bit, without the page table lock.

> Oh, I side-tracked a bit on the need to make the PTE update & hash flush
> atomic on ppc64 using the per-PTE lock _PAGE_BUSY bit we have there if
> we ever implement that lockless do_page_fault(), but that was a side

agreed.

> discussion, sorry for confusion.

No problem.

> Right, in your hypotetical scenario, I'd just have to make sure an std
> instruction is generated on ppc64

exactly.
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