Re: [PATCH] x86 bitops.h commentary on instruction reordering

[Vladislav Bolkhovitin]

Marcelo Tosatti wrote:
> > > Yes correct. *mb() usually imply barrier(). 
> > >
> > > About the flush, each architecture defines its own instruction for doing 
> > > so,
> > > PowerPC has  "sync" and "isync" instructions (to flush the whole cache 
> > > and instruction cache respectively), MIPS has "sync" and so on..
> >
> > So, there is no platform independent way for doing that in the kernel?
>
>
> Not really. x86 doesnt have such an instruction.

But how then spin_lock() works? It guarantees memory sync between CPUs, 
doesn't it? Otherwise how can it prevent possible races with concurrent 
data modifications?

Vlad
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