Re: small perfctr bug or misunderstanding

[Mikael Pettersson]

On Sat, 3 Jul 2004 16:08:29 +0200, bert hubert wrote:
>Mikael, thanks for the low-level-api.txt documentation. Will vperfctr_* see
>some documentation? Want me to whip up manpages?

Docs for the syscalls will appear shortly.

>So far perfctr has been very useful to me already - I now know parts of
>PowerDNS that are completely memory bound, which I so far only suspected.
>Are the global counters available? There is a note in the perfctl
>distribution that says they aren't?

Currently no; I removed them while we've been debating the
API to the (IMO more important) per-process counters.
I intend to add them back once the current stuff has been
Linus-approved.

>One thing - on my Pentium M I'm unable to get more than one counter going
>simultaneously, I get 'Operation not permitted'. Perfex reports that
>supposedly two are possible.

Classic beginner's mistake :-)

>  void addCounter(unsigned int v, unsigned int unit=0) 
>  {
>    int count=d_control.cpu_control.nractrs;
>
>    d_control.cpu_control.evntsel[count] = v | (1 << 16) | (1 << 22) | (unit << 8); 
>    d_control.cpu_control.pmc_map[count] = count;
>    d_control.cpu_control.nractrs++; // no support for .nrictrs
>  }

Quoting from Documentation/perfctr/low-level-x86.txt:

>Intel P6
>--------
>The evntsel values are mapped directly onto the counters'
>EVNTSEL control registers.
>
>The global enable bit (22) in EVNTSEL0 must be set. That bit is
>reserved in EVNTSEL1.
>...
>AMD K7/K8
>---------
>Similar to Intel P6. The main difference is that each evntsel has
>its own enable bit, which must be set.

The driver sees ENABLE set in EVNTSEL1 on your P-M,
and properly returns an error.

The proper way is for user-space to consider a set of
events (not yet added to the control struct), and to
use the current CPU type to format the control and
handle any quirks. For P6 vs K7 the differences are
minor, but to program the P4 you _really_ need helper
procedures.

/Mikael
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