Re: can TSC tick with different speeds on SMP?

[Zwane Mwaikambo]

On Mon, 21 Jun 2004, James Cleverdon wrote:

> IIRC, in the IA64 manuals Intel, by carefully not making any guarantees
> to the contrary, reserved the right to have the TSC-equivalent register
> not be synchronized either to the bus clock or the CPU clock.
>
> This doesn't directly apply to IA32, but may give a hint as to their
> future intentions.

The intel MP1.4 specification also allows for processors of
varying capabilities, this would include different clock speeds resulting
in differing TSC frequencies.

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