Re: Page aging broken in 2.6

[Arjan van de Ven]

> > And we never flush the TLB entry. 
> > 
> > I don't know if x86 (or other archs really using page tables) will
> > actually set the referenced bit again in the PTE if it's already set
> > in the TLB, if not, then x86 needs a flush too.
> 
> x86 needs a flush_tlb_page(), yes.

it does? Are you 100% sure ?

Afaik x86 is very very slow in setting the A and D bits (like 2000 to
3000 cycles) *because* it doesn't need a TLB flush....

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