Re: [PATCH] Athlon Prefetch workaround for 2.6.0test6

[Andi Kleen]

Gabriel Paubert <paubert@xxxxxxx> writes:

> On Mon, Sep 29, 2003 at 09:08:20PM +0100, Jamie Lokier wrote:
> > Btw, you assume that regs->xcs is a valid segment value.  I think that
> > the upper 16 bits are not guaranteed to be zero in general on the
> > IA32, although they clearly are zero for the majority of IA-32 chips.
> > Are they guaranteed to be zero on AMD's processors?
> 
> At least for pushes of segment registers a 486 decrements
> the stack pointer by 4 but only writes the 2 least significant
> bytes, leaving garbage in the upper half. 

The code only runs on newer AMD CPUs (K7/K8)

-Andi
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/