Re: Prefered method to map PCI memory into userspace.

[Andi Kleen]

Jim Deas <jdeas@xxxxxxxxxxxxxx> writes:

> I am looking for the most current (blessed) structure
> for mapping PCI memory to a user process. One that allows
> both PIO and busmastering to work on a common block of
> PCI RAM. I am not concerned with backporting to older
> kernels but it would be nice if the solution wasn't ibm specific.

mmap on /dev/mem

PIO cannot be done on memory, for that you have to use iopl() 
or ioperm() to get access to the port and then issue the PIO 
instructions yourself

The only trap with the mapping is getting uncached mappings
(most PCI hardware prefers uncached accesses). When the mapping
is beyond the end of memory the kernel will automatically 
map it uncached. PCI mappings are normally in the PCI hole
at the end of the 4GB area. When you machine has more than
4GB of ram this heuristic does not work and you have 
set MTRRs by hand using /proc/mtrr or use O_SYNC. The later is 
cleanest, but only works in newer kernels.

[BTW I consider this a kernel bug - it should always map mappings
to non memory uncached] 


-Andi
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