Re: x86, ARM, PARISC, PPC, MIPS and Sparc folks please run this

[Davide Libenzi]

On Wed, 3 Sep 2003, Nagendra Singh Tomar wrote:

> I meant to ask if the store buffer is snooped by *other CPUs*. To maintain
> self coherence the local store buffer has to be anyway consulted by local
> loads to give the latest stored value.

There are CPUs (at least some version of Alpha, 21064 IIRC) that uses
flush upon L1 read miss, so they do not snoop their local WB. IIRC P5 has
internal and external snooping while P6, using a write allocate L1, does
not have external snooping.



- Davide

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