Ryan Mack wrote:
> That at least explains the lack of DMA, but why does non-DMA IO result in
> such significant clock skew?
Sounds like the kernel is disabling interrupts for a long time, when
doing PIO data transfer (non-DMA IO).
Jeff
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This archive was generated by hypermail 2b29 : Mon Jul 07 2003 - 22:00:25 EST