Re: [CFT] faster athlon/duron memory copy implementation

From: Matthias Schniedermeyer (ms@citd.de)
Date: Thu Oct 24 2002 - 14:31:51 EST

On Thu, Oct 24, 2002 at 07:15:43PM +0200, Manfred Spraul wrote:
> AMD recommends to perform memory copies with backward read operations
> instead of prefetch.
>
> http://208.15.46.63/events/gdc2002.htm
>
> Attached is a test app that compares several memory copy implementations.
> Could you run it and report the results to me, together with cpu,
> chipset and memory type?
>
> Please run 2 or 3 times.

Ripping out the tests that didn't function on a P-III this is the result:

Athlon test program $Id: fast.c,v 1.6 2000/09/23 09:05:45 arjan Exp $
copy_page() tests
copy_page function '2.4 non MMX' took 15221 cycles per page
copy_page function '2.4 MMX fallback' took 15090 cycles per page
copy_page function 'no_prefetch' took 12531 cycles per page

Athlon test program $Id: fast.c,v 1.6 2000/09/23 09:05:45 arjan Exp $
copy_page() tests
copy_page function '2.4 non MMX' took 15053 cycles per page
copy_page function '2.4 MMX fallback' took 17020 cycles per page
copy_page function 'no_prefetch' took 11344 cycles per page

Athlon test program $Id: fast.c,v 1.6 2000/09/23 09:05:45 arjan Exp $
copy_page() tests
copy_page function '2.4 non MMX' took 14600 cycles per page
copy_page function '2.4 MMX fallback' took 16427 cycles per page
copy_page function 'no_prefetch' took 11822 cycles per page

System:
Dual-PIII
Serverworks HE-SL Chipset
3GB RAM. (2x512MB, 2x1GB (interleaved (AFAIK)))

cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 8
model name : Pentium III (Coppermine)
stepping : 3
cpu MHz : 930.214
cache size : 256 KB
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 mmx fxsr sse
bogomips : 1854.66

Bis denn 

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This archive was generated by hypermail 2b29 : Thu Oct 31 2002 - 22:00:24 EST