On Fri, 4 Oct 2002, Linus Torvalds wrote:
> The more I think about this, the more convinced I am this is the case. We
> just _mustn't_ set up a live PCI window at address 0, and expect it to not
> cause confusion.
>
> Also, we've seen before that we must not blindly disable a PCI window
> either, since that will kill the system when the host bridge is disabled
> and there is any pending DMA, for example (*). We saw that earlier in the
> 2.4.x tree - some host bridges will just ignore the disable (which means
> that then we'd trigger the zero-base bug), and others will honour the
> disable (which in turn will cause the DMA and other random problems).
>
> This is all probably dependently on host bridge / MCH behaviour, so it
> probably works fine on 90%+ of all machines, but clearly breaks enough to
> not be a viable approach in general.
It's getting better. The thing _does_ survive if there is no cacheline
boundary between the calls of pci_write_config_dword(); otherwise it
dies on that boundary. So it depends not only on machine and compiler,
but on kernel config, and in a pretty random way (functions are aligned,
indeed, but not cacheline-aligned, so change of length in a function can
shift the rest of image relative to cachelines).
-
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This archive was generated by hypermail 2b29 : Mon Oct 07 2002 - 22:00:49 EST