Hello,
I posted this question a few days ago but I did not get any response back.
If I sent my question on the wrong email list, I appreciate if someone gives
me some hints on what email list I should send my email to.
Thanks
Mehdi
----Original Message Follows----
From: "Mehdi Hashemian" <mhashemian@hotmail.com>
To: linux-kernel@vger.kernel.org
Subject: PTE question
Date: Wed, 18 Sep 2002 18:52:25 -0700
Hello,
Appreciate if someone checks this piece of code. I try to diable cache and
write-through bits in PTE but somehow PTE address is within first 16MB of
memory (DMA_ZONE) and later when Kernel tries to allocate more pages, it
chooses the same address range and this piece of code corrupts memory by
ORing these bits. Any help appreciated!
{
addr = __get_dma_pages(priority, order);
int npages = __get_npages(order);
unsigned long addr2 = addr;
pgd_t *pgd;
pmd_t *pmd;
pte_t *pte;
int i;
for (i = 0; i < npages; i++)
{
pgd = pgd_offset(&init_mm, addr2);
pmd = pmd_offset(pgd, addr2);
pte = pte_offset(pmd, addr2);
pte_val(*pte) |= (_PAGE_PCD | _PAGE_PWT);
addr2 += PAGE_SIZE;
}
__flush_tlb_all();
}
Mehdi
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