Re: [RFC] Improved add_timer_randomness for __CRIS__ (instead of rdtsc())

Date: Tue Aug 20 2002 - 11:32:29 EST

From: "Oliver Xymoron" <>
> On Tue, Aug 20, 2002 at 11:31:10AM +0200, wrote:
> > The cris architecture don't have any tsc, but it has a couple of
> > timer registers that can be used to get better than jiffie resolution.
> >
> > I set the time to a 40 us resolution counter with a slight
> > "jump" since lower 8 bit only counts from 0 to 249,
> > the patch does not take wrapping of the register into account either
> > to save some cycles, is that a problem or a good thing?
> That should be fine. More important is actually scaling the entropy
> count based on the timing granularity of the source. Keyboards and
> mice tend to have a granularity of about 1khz so timestamps better
> than milliseconds 'invent' entropy in the current code.

The ETRAX chips where the cris architecture is used is typically used in
headless embedded devices connected to a network. Currently I don't think
we use SA_RANDOM anywhere in our device drivers although it would be
nice to be able to use network and other interfaces as entropy/randomness
source (serial, parallel etc.) without to much concerns.

> > The num is xor:d with the value from 2 timer registers,
> > which in turn contains different fields breifly described below.
> >
> > Does the patch below look sane?
> Looks fine, but I think we want to come up with a cleaner scheme of
> having per-arch high-res timestamps. I'd hate to have that grow to
> several pages of ifdefs and not have it available anywhere else.

Yes, I've seen the discussion before.
Any idea of how such a solution should look like?
Put an inline function or macro in asm/timex.h (?) together with an

E.g. like this for i386:
#define RANDOM_TIMESTAMP(time, num) do{\
 if ( test_bit(X86_FEATURE_TSC, &boot_cpu_data.x86_capability) ) { \
  __u32 high; \
  rdtsc(time, high); \
  num ^= high; \
 } else { \
  time = jiffies; \
 } \
And then in random.c:
  RANDOM_TIMESTAMP(time, num);
  time = jiffies;


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