Alan Cox wrote:
>
> It certainly could be. If bits 29-31 maybe control things like memory
> timings then it could do quite horrible things. Fixing it to leave the
> ERRSTS register alone and keep bits 29-31 is definitely worth trying. If
> that fixes it then its going to be easy enough to drop a fix into the
> mainstream code
>
OK, I have a patch almost ready to do that except, I am not sure about
what to do for those 3 bits...
The *usual* call is :
pci_write_config_dword(agp_bridge.dev, INTEL_ATTBASE,
agp_bridge.gatt_bus_addr);
Where 'gatt_bus_addr' is returned from a 'virt_to_phys' on
'gatt_table_real'.
Should I mask those three bits out when writing or write
'gatt_bus_addr >> 3' instead ? I am not too sure about the assumptions
that can be made about what returns 'virt_to_phys' ...
Thanks in advance.
Nicolas.
-- Nicolas Aspert Signal Processing Institute (ITS) Swiss Federal Institute of Technology (EPFL)- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
This archive was generated by hypermail 2b29 : Fri May 31 2002 - 22:00:19 EST