From: William Jhun <wjhun@ayrnetworks.com>
Date: Fri, 24 May 2002 10:43:46 -0700
So, if I'm not mistaken, you are saying that I need to call
pci_dma_sync_single() *after* the DMA so that the CPU reclaims ownership
to the buffer? That's fine and probably serves a good purpose on other
architectures, but wouldn't I also need to do one before the DMA (after
the CPU write) operation to flush write buffers/writeback any cachelines
I've modified for non-cache-coherent architectures?
I see what your problem is, the interfaces were designed such
that the CPU could read the data. It did not consider writes.
It was designed to handle a case like a networking driver where
a receive packet is inspected before we decide whether we accept the
packet or just give it back to the card.
Feel free to design the "cpu writes, back to device ownership"
interfaces and submit a patch :-)
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