On Sat, Feb 09, 2002 at 12:09:04AM +0000, Alan Cox wrote:
> > SMP 486s would need that (if there is such a beast). What point does x86
> > get the 64 bit instructions? If after 586, then it would definitely need a
> > spin-lock or some-such in those functions.
>
> There are SMP 486 class x86 machines that are MP 1.1 compliant. They are
> sufficiently rare that I think its quite acceptable to "implement" a
> cmpxchg8b macro on 486 as spin_lock_irqsave/blah/spin_unlock_irqrestore. It
> would be wrong to cripple the other 99.99% of SMP users
>
Sorry, I only meant to say that the only question is where the split should
be between spin-lock and 64bit instruction...
This would be included in the appropriate config option.
Mike
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This archive was generated by hypermail 2b29 : Fri Feb 15 2002 - 21:00:24 EST