>My Keylargo controller reports 0 as the revision number, thus it might
>either be advisable to put that hw_can_byteswap = 0 into the innermost
>block and not check the revision at all (if no Keylargo can do byteswap)
>or or to put a check for revision <= 2 (after all, isn't it logical to
>assume that only later revisions will be able to do byteswap?) inside the
>innermost block and set hw_can_byteswap to 0 there.
You are right, this is a pangea chipset (KeyLargo & UniNorth in a
single ASIC) and in that case, KL provides no rev. number. I'll fix
this.
Thanks for the report,
Ben.
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This archive was generated by hypermail 2b29 : Wed Jan 23 2002 - 21:00:33 EST