On Fri, Nov 09, 2001 at 09:28:09AM +0100, Ingo Molnar wrote:
>
> On Thu, 8 Nov 2001, Mike Fedyk wrote:
>
> > It remains to be proven whether the coarser scheduling approach
> > (Ingo's) will actually help when looking at cache properties.... [...]
>
> have you seen the numbers/measurements i posted in my original email? 3%
> kernel compile speedup on an 'idle' 8-way system, 7% compilation speedup
> with HZ=1024 and background networking load on a 1-way system.
>
Yep, but it probably won't do as well on my 2x366 celeron system that I use
every day...
Haven't tested, but it looks like there wouldn't be much chance of the third
CPU hog to stay in the caches. That's pretty much flushing the entire cache
of the previous task with the longer periods of execution.
Now, if the number of sequential jiffies were modified based on the L1/L2
cache sizes that would be interesting...
Also Ingo, if you're worried about your processes staying in the cache, I'd
work on the processor affinity before working on this... But, then again,
I'm not you, and I don't know how myself... :(
Mike
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This archive was generated by hypermail 2b29 : Thu Nov 15 2001 - 21:00:21 EST