On Wed, Aug 08, 2001 at 11:53:28AM -0700, David S. Miller wrote:
1) tell me D-cache misses in user and/or kernel mode
2) tell me D-cache misses that hit the E-cache
in user and/or kernel mode
3) tell me I-cache misses, but only those which actually
ended up stalling the pipeline
4) tell me E-cache misses, where the chip was not able
to get granted to memory bus immediately
5) Same as #4, but how many total bus cycles were spent
waiting for bus grant for the E-cache miss
ia32 for PPro and above can do all of that too pretty much (perhaps
not exactly the same metric, but hopefully equally useful). The only
thing is, you can read them all at once, only a small number of them,
and they are for all kernel/userland states, so you would need to
save/read them on context switches.
--cw
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This archive was generated by hypermail 2b29 : Wed Aug 15 2001 - 21:00:36 EST