> I suspect the ohci driver currently. I've been reviewing it a little and it
> is full of code written by someone who does not know about pci write posting.
I think there's a lot of that going around ... I don't think any of what you
mentioned was in the Documentation/pci.txt writeup, or any other source
of kernel documentation I found when I started to look at at that code!
That diagnosis works as well with the known facts as any other; maybe
better, considering some of the info I've collected offline. And it could
also explain some other intermittent failures.
> You have to do
>
> writel(STOP, reg->dmactrl);
> [posted]
> readl(reg->dmactrl)
> [read forces write, read reply will follow any DMA
> pending the other way]
Good to know. That'd apply for any register read, not just the
one that was written to, yes?
- Dave
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This archive was generated by hypermail 2b29 : Mon May 07 2001 - 21:00:21 EST