Re: Serial port latency

From: Paul Fulghum (paulkf@microgate.com)
Date: Thu Mar 22 2001 - 15:55:38 EST


> The serial port chip is 16550A, which has a built in fifo. Can this be
> the source of my problems ?
>
> Geir

I thought about that. If the number of receive bytes in the RX FIFO
is less that the trigger level then a timeout has to occur before
getting the next receive data interrupt.

The 16550AF data book says that this timeout is 4 characters
from when the last byte is received. This is a maximum of 160ms
at 300bps (when using 12bit characters: 1 start + 8 data + parity + 2 stop).

So this would be smaller at 9600 and could not account
for the 500ms delay.

Paul Fulghum paulkf@microgate.com
Microgate Corporation www.microgate.com

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This archive was generated by hypermail 2b29 : Fri Mar 23 2001 - 21:00:18 EST